Accelerating the Deployment of 112G end-to-end Datacenter Connectivity
Milpitas, Calif., January 30, 2018 – Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its low power, high performance 112Gbps (G) PAM4 SerDes technologies at DesignCon 2018. The conference starts today at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits taking place Jan 31 and Feb 1.
‘’Datacenter, enterprise and high performance computing environments require continued innovation for serial link technology to meet the ever growing thoughput demand,”said Rajan Pai, vice president of system applications at Credo. “Our 112G PAM4 demonstrations with high-profile test equipment and connector manufacturers are laying the groundwork for providing ubiquitous 112G lane-rate connectivity at the performance and scale required.”
“Credo’s demonstations of 112G electrical connectivity are being well received,” said Jeff Twombly, vice president of business development at Credo. “End customers continue to push for significant increases in network bandwidth and the industry as a whole will benefit greatly by a rapid move to single lane rate, end-to-end 112G deployments.”
Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity. The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates: www.credosemi.com