Credo Demonstrates 112G PAM4 and 56G PAM4 SerDes IP Solutions at TSMC 2018 Technology Symposium

HyperScale Data Center Connectivity in 100G, 200G, and 400G Networks

Santa Clara, Calif., May 1, 2018 – Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its advanced high performance, low power SerDes IP offerings at this week’s TSMC Technology Symposium, featuring single-lane rate 112G PAM4 and single-lane rate 56Gbps PAM4.

The wide range of Credo SerDes IP solutions enables ASIC, ASSP, and SoC designers to meet the power and performance requirements of a variety of applications including switching, general purpose computing, artificial intelligence, and machine learning all of which are fueling expansion in next generation data center, enterprise, and telco networks.

WHERE: TSMC Open Innovation Platform Ecosystem Forum

Santa Clara Convention Center

5001 Great America Parkway

Santa Clara, CA 95054

Booth # 403

WHEN: May 1, 2018 at 8:30 a.m. – 5:30 p.m.

WHAT: The TSMC Technology Symposium brings together TSMC's design ecosystem companies and our customers to share practical, tested solutions to today's design challenges. Success stories that illustrate TSMC's design ecosystem best practices highlight the event.

About Credo

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced process nodes and with complementary product families focused on extending reach and multiplexing to higher data rates. Credo has offices in Milpitas, Taiwan, Shanghai and Hong Kong.

For more information:  www.credosemi.com

 

Press Contact: Jen Peckham, jen.peckham@credosemi.com

Credo Demonstrates Robust, Low-Power 112G PAM4 Solutions at OFC 2018 Accelerating End-to-End 112G HyperScale Cloud Connectivity

San Diego, CA, March 12, 2018 | Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct optical and electrical demonstrations utilizing its low power, high performance 112Gbps (G) PAM4 SerDes technology and solutions at the 2018 Optical Networking and Communication Conference (OFC). The 112G SerDes technology was developed in mature TSMC process technologies.  For 112G per lambda optical connectivity (i.e., DR, DR4, FR4), Credo has delivered product solutions in TSMC 28nm.  For 112G electrical VSR and LR reaches, Credo has delivered the solutions in TSMC 16nm.  The conference starts today at the San Diego Convention Center, with exhibits taking place March 13–15.

“Credo’s ability to deliver leading edge performance at the industry’s lowest power in mature TSMC process nodes enables rapid time-to-market at a cost structure that will accelerate the transition to the 112G connectivity radix,” said Jeff Twombly, vice president of business development at Credo. “hyperscale cloud providers want to move to single lane rate 112G connectivity as soon as possible. We are aggressively working with strategic ecosystem partners for 2019 trials which will enable production scale ramping in 2020.”

“112G SerDes is a critical technology for the networking space.  It will enable next generation 400 Gbps and 800 Gbps switching platforms in the data center for the cloud hyperscalers and become an important technology for datacenter interconnect, enterprise, and service provider markets, “ said Alan Weckel founder of 650 Group. “With market shipments of 56G SerDes in 2018, the market will see 112G SerDes based products by 2020 which we believe will help propel the data center switching forward in the next decade.”

Credo will demonstrate it’s 28nm 112G PAM4 Retimer DR device (CMX125100KP) in a full TOSA-ROSA optical link demonstration on the show floor in the Keysight booth #2501.

Credo’s 112G PAM4 electrical reach demonstrations will be on the show floor in the OIF booth #5525.

OIF Delivers on Another Industry First!

OIF member companies have teamed up to demonstrate significant progress in delivering an interoperable ecosystem of suppliers and solutions for critical market needs: 

•   FlexE (Flex Ethernet)  

•   112 Gbps / lane live electrical signaling

•   End to End (host to host) optical link using electrical 56 Gbps VSR, included in newly released CEI 4.0

 

Press Contact:

Jen Peckham

Jen.peckham@credosemi.com

Open-Silicon, Credo and IQ-Analog Showcase Complete End-to-End Networking ASIC Solutions at OFC 2018

San Diego, CA, March 12, 2018 | Open-Silicon, Credo and IQ-Analog will participate in joint demonstrations at the Optical Fiber Communications Conference (OFC) 2018 in San Diego, CA on March 13-15. The companies will showcase their complete end-to-end ASIC solutions for leading-edge networking applications, such as long-haul, metro and core, broadband access, optical, carrier IP and data center interconnect. Open-Silicon will present its ASIC offerings as well as its comprehensive Networking IP Subsystem Solution, which includes high-speed chip-to-chip interface Interlaken IP, Ethernet Physical Coding Sublayer (PCS) IP, FlexE IP compliant to OIF Flex Ethernet standard v1.0 and v2.0, and Multi-Channel Multi-Rate Forward Error Correction (MCMR FEC) IP. Open-Silicon will also demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution. Credo will demonstrate its high-speed 56Gbps PAM4 LR Multi-Rate SerDes solution and 112Gbps PAM4 SR/LR SerDes targeted for next generation networking ASICs. IQ-Analog will showcase its high-performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).

 

“This collaborative demonstration with our partner companies is an excellent opportunity to unveil the power of a complete end-to-end solution for the next generation of high performance networking applications,” said Taher Madraswala, President and CEO of Open-Silicon. “Having representatives from all three companies in one place also presents a unique opportunity for attendees to discuss their ideas and unique design requirements.”

 

“Credo's silicon proven 56G/112G SerDes IPs, combined with Open-Silicon's SerDes technology center of excellence, can minimize risk and time-to-market for developing the next generation of networking and data center ASICs,” added Bill Brennan, President and CEO of Credo.

 

“IQ-Analog’s patented TPWQ hyper-speed 90Gsps ADC/DAC IPs, combined with Open-Silicon’s robust physical design methodology, enables development of the next generation of carrier IP and optical networking ASICs with industry leading power, area and performance,” said Mike Kappes, President and CEO of IQ-Analog.

When: March 13–15, 10 A.M. to 5 P.M.

Where: Exhibit Floor, Booth # 6307, San Diego Convention Center, San Diego, CA, USA

#     #     #

Open-Silicon is a trademark and service mark of Open-Silicon, Inc. registered in the United States and other jurisdictions. All other trademarks are the property of their respective holders.

 

Contact Information:

Purvi Shenoy

Open-Silicon

408-240-5772

purvi.shenoy@open-silicon.com

 

Media Contact:

Jennifer DeAnda

208-794-7113

jennifer.deanda@gmail.com

TE Connectivity and Credo pave the way for 112G single lane connectivity

Live demonstration for the first time at DesignCon 2018

HARRISBURG, Pa. – January 31, 2018 –  TE Connectivity (TE), a world leader in connectivity and sensors,  and Credo, a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets, today announced they have teamed up to demonstrate the future of networking technologies. The companies will hold  demonstrations of 112Gbps over a chip to module (IO) channel and over a backplane channel at DesignCon 2018.  The demonstrations will be unveiled in booth #817 at DesignCon, which takes place in the Santa Clara, CA convention center from January 31 through February 1..  As industry groups, such as OIF and IEEE, meet to discuss feasibility of these types of links at these next generation data rates, TE and Credo will be demonstrating performance on actual hardware.

The IO channel demonstration uses TE’s OSFP IO connector with Credo’s 16nm, lower power, high performance 112G PAM4 SerDes technology to exhibit operation over a 10-inch printed circuit board (PCB) channel.  The "O" is for "octal" — it is being designed to use eight electrical lanes to deliver 400GbE — and "SFP" is for "small form factor pluggable. The channel is driven by Credo’s 112G PAM4 SerDes, which is operating over a total ball-to-ball channel loss of >15 decibel (dB).  The demo shows bit error rate (BER) performance of better than 1e-7.  The OSFP IO connector is a state-of-the-art 8 channel IO connector currently adopted for 400Gbps applications.  The demonstration establishes TE’s OSFP connector performance as an 800Gbps capable IO solution.

The backplane demonstration uses TE’s latest STRADA Whisper orthogonal backplane connector  operating with a total channel loss of 20 dB at 28 GHz in a PCB-based direct plug orthogonal (DPO) architecture.   Driven by Credo’s 112G PAM4 SerDes, the demo shows BER performance levels that fully enable the adoption of STRADA Whisper solutions for the next wave of networking equipment.

“Credo’s proven low power silicon expertise being advanced to 112G SerDes is a key technology milestone.  Credo is enabling the industry to progress quickly to 112Gbps serial electrical signaling, which paves the way for accelerating the deployment of 112G single lane, end-to-end network connectivity. Enabling faster data, in smaller spaces at a potentially lower cost”, according to TE’s Nathan Tracy, technologist, member of system architecture team and industry standards manager.

“TE’s OSFP IO connector demonstrates the extremely low noise performance that will be required in 112Gbps IO applications.  In addition, the performance of TE’s latest STRADA Whisper backplane connector enables the balance of the 112Gbps signaling interconnect ecosystem. TE’s world-class interconnect performance has demonstrated that it is 112Gbps ready,” said Jeff Twombly, vice president of business development at Credo.

To learn more about TE’s live demonstrations at DesignCon or schedule an on-site meeting, visit our DesignCon 2018 events page.

ABOUT TE CONNECTIVITY

TE Connectivity Ltd. (NYSE: TEL) is a $13 billion global technology and manufacturing leader creating a safer, sustainable, productive, and connected future. For more than 75 years, our connectivity and sensor solutions, proven in the harshest environments, have enabled advancements in transportation, industrial applications, medical technology, energy, data communications, and the home. With 78,000 employees, including more than 7,000 engineers, working alongside customers in nearly 150 countries, TE ensures that EVERY CONNECTION COUNTS. Learn more at www.te.com and on LinkedIn, Facebook, WeChat and Twitter.

About Credo

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates:  www.credosemi.com

Credo Demonstrates Robust 112G PAM4 Single Lane Electrical SerDes Techology at DesignCon 2018

Accelerating the Deployment of 112G end-to-end Datacenter Connectivity

Milpitas, Calif., January 30, 2018 – Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its low power, high performance 112Gbps (G) PAM4 SerDes technologies at DesignCon 2018. The conference starts today at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits taking place Jan 31 and Feb 1.

 ‘’Datacenter, enterprise and high performance computing environments require continued innovation for serial link technology to meet the ever growing thoughput demand,”said Rajan Pai, vice president of system applications at Credo. “Our 112G PAM4 demonstrations with high-profile test equipment and connector manufacturers are laying the groundwork for providing ubiquitous 112G lane-rate connectivity at the performance and scale required.”

“Credo’s demonstations of 112G electrical connectivity are being well received,” said Jeff Twombly, vice president of business development at Credo. “End customers continue to push for significant increases in network bandwidth and the industry as a whole will benefit greatly by a rapid move to single lane rate, end-to-end 112G deployments.”

The 112G PAM4 demonstrations will be with Amphenol FCI (Booth #833), Keysight (Booth #725),  Molex (Booth #633),  Samtec (Booth #841), and TE Connectivity (Booth #817).

 

About Credo

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates:   www.credosemi.com

 

 

Source Photonics and Credo Semiconductor Demonstrate Single Lambda 100G Connectivity over 20km of Fiber with Compact TOSA and ROSA Assemblies

ECOC, Gothenburg, Sweden – September 18, 2017 – Source Photonics and Credo Semiconductor are pleased to announce a single lambda 100Gbits/sec connectivity demonstration over 20km of fiber using a compact TOSA and ROSA capable of 53Gbaud PAM4 operation.

Increasing demand for more bandwidth in Cloud Data Centers is creating the need for more efficient and higher throughput optical transceivers beyond the currently deployed 100G 4x25G WDM technology. These next generation transceivers will need to support higher order modulation techniques such as PAM4 and higher data rate operation at 53Gbaud. Implementations that can be supported with this technology include 400G-DR4/FR4 in addition to 100G-DR/FR/LR.

The demonstration consists of Source Photonics internally packaged TOSA and ROSA sub-assemblies in an optical loopback configuration through 20km of single-mode fiber using a single 100G channel of Credo’s low power PAM4 IC technology.  The bit-error-rate (BER) after 20Km of fiber remained better than the KP4 FEC requirement and was around 5x10-5 . The TOSA is based on Source Photonics’ EML laser technology which provides the necessary bandwidth to achieve a TDECQ value below 2.5dB. The room temperature link budget of 10dB provides considerable margin for the most significant link specifications under development in the industry, allowing production margin for performance variations. These results show that the building blocks necessary to realize 53Gbaud single lambda operation are available and ready to serve the needs of next generation data center deployments.

What this demonstration achieves with one laser and one receiver currently requires four lasers and four receivers – facilitating not only lower cost future 100G but also accelerating the development of 400G products.

“We are continuing to invest in next generation technology, such as Single Lambda 100G, as part of our commitment to providing leading edge solutions for data centers.” said Doug Wright, CEO of Source Photonics.

“The HyperScale Cloud Providers have spoken and 100G per lambda solutions are a key connectivity priority.” said Rajan Pai, vice president of system applications at Credo. “Our unique SerDes architecture allows us to deliver single-lane 100G performance at the lowest power which will enable the volume deployments of 100G and 400G optical modules.”

Source Photonics will be hosting a private demonstration at their booth number 162 at ECOC 2017 to be held in Gothenburg, Sweden from September 18-20, 2017. To schedule an appointment to view the demo, please contact Jasmin Basa at jasmin.basa@sourcephotonics.com.

About Source Photonics:
Source Photonics is a leading provider of innovative and reliable optical communications technology that enables communications and connectivity in data centers, metro, and access networks. We invent next-generation solutions to provide customers with enabling technologies to support the rapidly increasing demands of cloud infrastructure, wireless communications, routing, and fiber-to-the-premises worldwide. Source Photonics is headquartered in West Hills, California, with manufacturing facilities, R&D, and sales offices worldwide.

For more information about Source Photonics, please visit www.sourcephotonics.com.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong. 

For more information:  www.credosemi.com

Credo Demonstrates Single-Lane 100G PAM-4 at ECOC 2017

Shows Solutions For HyperScale Data Center Connectivity in 100G, 200G and 400G Networks

Gothenburg, Sweden – September 18, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate single-lane 100G PAM-4 SerDes performance at this week’s ECOC 2017 Conference in Gothenburg, Sweden. 

The HyperScale Data Center providers view 100G per lambda optical connectivity as a strategic priority. The demonstration hosted in the Keysight booth shows the complete transmit path from two 50G PAM-4 host-side interface lanes to a single-lane 100G PAM-4 optical Tx.  Implementations that can be supported with this technology include 400G-DR4/FR4 in addition to 100G-DR/FR/LR.

WHERE:      

ECOC 2017 Conference

Gothenburg, Sweden

Keysight Booth (Hall 3, stand 239)

WHEN:        

September 18 - 20, 2017     

9:30 a.m. – 5:00 p.m.

WHAT:        

ECOC is one of the premier international conferences in the field, with an exciting and comprehensive coverage of cutting-edge basic and applied research. Each year, ECOC offers unique insights into leading developments in optical communications and unparalleled networking with over 5,000 of your colleagues from all over the world.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced process nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com

Press Contact:

Jen Peckham

jen.peckham@credosemi.com

Credo Demonstrates Single-Lane 50G NRZ at ECOC 2017

Shows Solutions in Support of the 400G CWDM8 MSA to Enable the Deployment of 400G 2km and 10km Optical Links in Data Centers

Gothenburg, Sweden – September 18, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate single-lane 50G NRZ at this week’s ECOC 2017 Conference in Gothenburg, Sweden. 

A device supporting CDR (Clock and Data Recovery) functionality for 50G PAM4 host-side electrical facing interfaces to 50G NRZ optical line-side facing interfaces is a key enabling building block for optical modules conforming to the CWDM8 MSA (8-wavelength Coarse Wavelength Division Multiplexing Multi-Source Agreement).  Working with Keysight, Credo is showing a live demo of it’s low power 50G PAM4 to 50G NRZ technology in support of the CWDM8 MSA’s effort to accelerate 400G optical module deployments.

https://cwdm8-msa.org/static/docs/CWDM8-MSA-Press-Release.pdf

WHERE:      

ECOC 2017 Conference

Gothenburg, Sweden

Keysight Booth (Hall 3, stand 239)

WHEN:        

September 18 - 20, 2017

9:30 a.m. – 5:00 p.m.

WHAT:        

ECOC is one of the premier international conferences in the field, with an exciting and comprehensive coverage of cutting-edge basic and applied research. Each year, ECOC offers unique insights into leading developments in optical communications and unparalleled networking with over 5,000 of your colleagues from all over the world.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced process nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com

Press Contact:

Jen Peckham

jen.peckham@credosemi.com

Credo Receives Coveted TSMC 2017 Open Innovation Platform® Partner of the Year Specialty Technology IP Award

Milpitas, Calif., September 14, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced that it received TSMC’s 2017 Open Innovation Platform Partner of the Year Award in the category of Specialty Technology IP.

“Credo has emerged as valuable OIP partner to TSMC by enriching our ecosystem with leading edge SerDes technology that is critical to enabling next generation data center solutions,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. “This distinction recognizes their performance in providing high performance SerDes IP in TSMC’s advanced process nodes.”

Credo provides a comprehensive portfolio of 28G NRZ and 56G PAM-4 SerDes IP solutions for a wide range of applications including hyperscale data centers, high performance computing, artificial intellingence, enterprise networks, and service provider networks. Leveraging Credo’s unique, patented mixed signal processing technology, Credo’s SerDes delivers industry-leading performance and low power on a wide range of TSMC process nodes.

"The award recognition from TSMC reflects our long-standing partnership and further strengthens our ongoing commitment to delivering a strong SerDes IP portfolio for next generation SoC designs,” said Bill Brennan, President and CEO of Credo. "We continue to see intense demand for faster interconnect solutions, and our goal is to enable the market transition to higher speeds through our collaboration with TSMC."

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  Credo has offices in Milpitas, California, Shanghai, and Hong Kong.  For more information:  www.credosemi.com 

Press Contact:

Jen Peckham

Jen.peckham@credosemi.com

Credo Demonstrates Single-Lane 112G and 56G PAM4 SerDes IP Solutions at TSMC 2017 OIP Ecosystem Forum

Shows Solutions For HyperScale Data Center Connectivity in 100G, 200G and 400G Networks

Milpitas, Calif., September 13, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its full offering of advanced SerDes IP at this week’s TSMC Technology Symposium, showcasing single-lane 112G PAM4 SerDes solutions.

The wide range of Credo SerDes IP solutions enables ASIC, ASSP, and SoC designers to meet the power and performance requirements of a variety of TSMC advanced processing nodes and supports emerging IEEE standards including 802.3cd/802.3bs/802.3bm which call out 100GBase-DR1, 400GBase-DR4, and 400GBase-FR4.

WHERE:      

TSMC Open Innovation Platform Ecosystem Forum

Santa Clara Convention Center

001 Great America Parkway

Santa Clara, CA 95054

Booth #907

WHEN:        

September 13, 2017

8:00 a.m. – 6:30 p.m.

WHAT:        

The TSMC OIP Ecosystem Forum brings together TSMC's design ecosystem companies and our customers to share practical, tested solutions to today's design challenges. Success stories that illustrate TSMC's design ecosystem best practices highlight the event.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced process nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com

Press Contact: 

Jen Peckham

jen.peckham@credosemi.com

Credo and FIT Deliver Robust 10m 100G Active Copper Cable Solutions

Low Power Technology Delivers Robust, Low Cost Data Center Connectivity Solutions

Milpitas, Calif., May 22, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, and Foxconn Interconnect Technology, Inc. ("FIT"), a leading supplier of interconnect solutions, announced today that they will demonstrate robust and error-free 100G QSFP28 active copper cable (ACC) connectivity solutions with reach up to 10 meters (m) in a private suite at the Grand Hyatt during the Computex Show, May 30-June 3, in Taipei. 

The new cables will enable server designers to transition to higher bandwidths using cost-effective copper solutions, rather than having to adopt costly optical alternatives. To that end, Centec, an established leader in Ethernet switching, intends to adopt ACC for its data center solutions, accelerating the transition to the technology in 100G intra-rack and inter-rack applications.

‘’The continuous demand to lower cost while increasing bandwidth in data centers requires on-going innovation of serial link technology,” said Jeff Twombly, vice president of business at Credo. “The combination of FIT’s latest QSFP28 ACC and Credo’s low power, low latency 100G retimer devices provides a low cost alternative to conventional active optical cables (AOCs) for intra and inter-rack connections.”

“Centec has been focusing on high-speed Ethernet switch silicon design for over 12 years,” said XiaoYang Zheng, vice president of engineering at Centec. “This newly released QSFP28 ACC is an exciting innovation to thefast growing 100GE connections, as it maintains the same high performance while lowering power consumption and cost. We’re glad to be one of the early adopters of this new technology. Combined with Centec’s Ethernet switching silicon, we believe this new ACC will bring great value to our customers for high-speed connections, such as in data centers.”

“Partnering with Centec is proof that a 100G ACC is a cost-effective alternative to AOC solutions for intermediate reaches from three to 10 meters,” said Yan Margulis, vice president of sales at FIT. “We expect this innovation to accelerate the transition to 100G in the data center—something that has been enabled by our close collaboration with Credo.”

To support the demand for ever-growing  bandwidth, maintaining copper interconnects between servers and top-of-rack switches would save significant capital expenditure (CAPEX) spending in the transition from 10G to 25G single lane data rates. The joint development of 100G QSFP28 ACCs   provides connectivity between standard QSFP ports. The QSFP28 ACC is capable of supporting four full-duplex lanes, with each lane transmitting data up to 25G per direction, providing an aggregate bandwidth of 100G. The ACC utilizes Credo’s state- of-the-art mixed-signal processing technology to provide cost-effective intermediate-reach data center interconnects, unachievable with passive copper cable (PCC). Leveraging Credo’s unique low power technology, the 100G ACC consumes significantly less power than that of competing AOCs.

Please contact sales@credosemi.com to schedule a time to view the 10m ACC demonstration.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com

About Foxconn Interconnect Technology, Limited (“FIT”)

Foxconn Interconnect Technology, Limited focuses on the development, manufacturing and marketing of electronic and optoelectronic connectors, antennas, acoustic components, cables and modules for applications in computers, communication equipment, consumer electronics, automobiles, industrial and green energy field products. With offices and manufacturing sites located in Asia, the Americas and Europe, FIT is a global leader in the manufacturing of high precision interconnect components.

For more information, visit FIT's website: http://www.fit-foxconn.com

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Credo is a trademark of Credo Semiconductor.  All other trademarks are the property of their respective holders.

Credo Unveils Robust Portfolio of 56G and 112G PAM-4 PHY Connectivity Solutions

High-Performance, Low-Power Devices Enable Data Center Scalability to 50G, 100G, 200G, 400G and Beyond

 Milpitas, Calif., May 8, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced a comprehensive portfolio of 56G and 112G PAM-4 PHY devices, enabling connectivity for enterprise, hyperscale datacenter, and service provider networks. Leveraging Credo’s unique, patented mixed signal processing technology, the new PHY devices deliver industry-leading performance and low power. This unique approach avoids the need for power-hungry DSP SerDes architectures and the requirement to be on the most advanced processing nodes. Credo has also leveraged its low latency, low power forward error correction (FEC) technology to guarantee end-to-end, error-free performance as networks transition from 25G to 50G and 100G single-lane rates.

“Our new portfolio has been developed to meet the bandwidth requirements of the next generation of hyperscale datacenter buildouts,” said Jeff Twombly, vice president of business development for Credo. “With a unique architecture that delivers the best of both analog and digital approaches, these new 56G and 112G PHY devices achieve power and performance targets in 28nm that have not been possible with competitive approaches. This means that we are able to meet stringent customer requirements while leveraging more cost-effective process nodes.”

“As manufacturers begin to develop equipment for emerging hyperscale data centers, they not only need guarantees of error-free transmission from their PHYs, but also want to build their systems and networks as efficiently as possible,” said Simon Stanley, principal consultant at Earlswood Marketing. “Architectures that can meet the power and performance requirements of next-generation networking equipment without having to move to smaller geometries have the potential to reduce time, cost and risk for these manufacturers.”

The Credo connectivity solutions are optimized for a range of applications.  The optical family is focused on QSFP28, QSFP56, QSFP-DD, and OSFP pluggable modules supporting standards such as DR1, 2xDR1, DR4, FR4, FR8, and CWDM8.  The copper family provides designers with a range of solutions to deliver robust signal integrity connections for backplane, front-panel and ACC.

Credo Optical Connectivity:

  • CMX125100P - 100G (4x28G NRZ to 1x112G PAM-4 PHY) for QSFP28 (i.e., DR1)
  • CMX225100P - 200G (8x28G NRZ to 2x112G PAM-4 PHY) for QSFP-DD, OSFP (i.e., 2xDR1)
  • CMX450100P - 400G (8x56GG PAM-4 to 4x112G PAM-4 PHY) for QSFP-DD, OSFP (i.e., DR4, FR4)
  • CRT5014P - 400G (4x56G PAM-4 to 4x56GG PAM-4) for QSFP56 (i.e., CWDM4)
  • CRT5018P - 400G (8x56G PAM-4 to 8x56GG PAM-4) for QSFP-DD, OSFP (i.e., FR8, CWDM8)

Credo Copper Connectivity:

  • CMX22550P - 200G (4x56G PAM4 to 8x28G NRZ PHY) for backplanes and line cards
  • CMX42550P - 400G (8x56G PAM4 to 16x28G NRZ PHY) for backplanes and line cards
  • CRT5024P - 200G (4x56G PAM4 PHY to 4x56G PAM4 PHY) for servers, NIC, and line cards
  • CRT5028P - 400G (8x56G PAM4 PHY to 8x56G PAM4 PHY) for backplanes and line cards
  • CRT50216P - 800G (16x56G PAM4 PHY to 16x56G PAM4 PHY) for backplanes and line cards

Several members of the Credo connectivity family are sampling and Credo has evaluation platforms to validate in-system performance.  Please contact sales@credosemi.com for more information.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  Credo has offices in Milpitas, California, Shanghai, and Hong Kong.  For more information:  www.credosemi.com

Credo Demonstrates Single-Lane 112G and 56G PAM4 SerDes IP at TSMC Technology Symposium 2017

Shows Solutions For Data Center Connectivity in 100G, 200G and 400G Networks

Milpitas, Calif., March 13, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its full offering of advanced SerDes IP at this week’s TSMC Technology Symposium, including a single-lane 112G PAM4 short reach (SR) IP solution and long reach (LR) 56Gbps PAM4 SerDes IP solution.

The wide range of Credo SerDes IP solutions enables ASIC, ASSP, and SoC designers to meet the power and performance requirements of a variety of emerging IEEE standards and Optical Internetworking Forum (OIF) implementation agreements, including 100GBase-DR1, 400GBase-DR4, and 200G/400GBase-FR4.

WHERE:   TSMC Technology Symposium

                Santa Clara Convention Center

                5001 Great America Parkway

                Santa Clara, CA 95054

                Booth #903

 

WHEN:     March 15, 2017

                8:30 a.m. - 5:45 p.m.

 

WHAT:     The 23rd annual TSMC Technology Symposium will showcase TSMC’s advanced and specialty technologies, advanced backend capabilities and future development plans.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates. Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong. 

Credo Demonstrates 112G PAM4 SR, 56G PAM4 LR, and 56G NRZ SerDes Technology at DesignCon

Robust Low Power Solutions Drive Error-Free Connectivity in Backplanes and Copper Cables

Milpitas, Calif., January 30, 2017 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its low power 112Gbps(G) PAM4, 56G PAM4 LR and 56GNRZ LR SerDes technologies at DesignCon 2017. The conference takes place this week at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits running Feb 1-2.

"The continued demand to accelerate bandwidth in data center, enterprise and high performance computing environments requires continued innovation for serial link technology," said Rajan Pai, vice president of system applications at Credo. “These demonstrations show how our unique SerDes architecture creates new opportunities for cable and backplane manufacturers, delivering the low power and error-free connectivity these solutions demand.”

emonstrations with Keysight (Booth #725) and Amphenol (Booth #641) will showcase Credo’s low power 112G PAM4-SR and 56G PAM4-LR technology.  Molex (Booth #619) demos leverage Credo’s 56G PAM4-LR and 56G NRZ LR SerDes IP over copper cables and backplanes. The 56G NRZ demonstrations highlight the fact that high performance computing (HPC) environments have the ability to deploy low latency, error-free systems without the need for forward-error correction (FEC).  Additionally, Credo is demonstrating long-reach 28G technology with Leoni (Booth #946), showcasing 10-meter cables for data center connectivity.

Demonstrations with Amphenol

Credo will conduct two demonstrations with Amphenol. The first will show 112G PAM4 SR transport over Amphenol’s ExaMAX+™ Direct-Mate Orthogonal connector system. The second demonstration will show 56G PAM4 transport over FCI’s ExaMAX® backplane interconnect system with over 35dB of insertion loss.

"Amphenol’s portfolio of high-speed interconnect solutions is unmatched in the industry," said Dana Bergey, signal integrity manager at Amphenol’s Valley Green Design Center.  "ExaMAX connectors are used in many 28G applications around the world—in standard backplane, midplane, mezzanine, coplanar, and direct-mate orthogonal configurations.  At last year’s DesignCon exhibit, we worked with Credo to show standard ExaMAX products running—error-free—with 56G PAM4 and 56G NRZ silicon. This year, we are demonstrating 112G PAM4 signal transmission using Credo silicon and Amphenol’s new ExaMAX+ extension to the ExaMAX connector family."

Demonstrations with Keysight

The Credo demonstration with Keysight will highlight Credo’s 112G PAM4 evaluation board and Keysight’s new 100 GHz N1046A remote head plug-in module for the 86100D DCA-X Wide Bandwidth Oscilloscope. The live demonstration in the Keysight booth will show the new Keysight measurement system performing actual measurements on Credo’s 112 Gb/s, 56 Gbaud PAM4 devices, which are among the first available on the market at this speed.

"Keysight has extended the bandwidth of its popular DCA-X series of oscilloscopes to 100 GHz in order to provide the best fidelity and highest measurement accuracy for characterization of next-generation SerDes and systems using PAM-4 modulation in excess of 50 Gbaud (100 Gb/s)," said Joachim Peerlings, vice president and general manager, networks and data centers solutions, Keysight.

The Keysight DCA-X system’s unmatched capability showcases the state-of-the art performance of Credo’s chipset and was a key enabler in its development. 

Demonstrations with Molex

Credo will conduct three demonstrations with Molex. For the first demonstration, Credo will supply transmitting and receiving electronics, showing error-free 56G NRZ and 56G PAM4 live serial traffic with crosstalk aggressors on Molex’s Impulse™ OD Backplane Connector System.  The second will feature Molex’s Impel™ PLUS Backplane Connector System using Credo’s 56G PAM4 LR evaluation system to transmit 56 Gbps PAM4 data, showing error-free performance.  The third demonstration shows error-free 56G PAM4 traffic through an eight meter copper cable using the zQSFP+™form factor.

"This demonstration will highlight the feasibility of running extremely high speed, next-generation data rates, on form factors that are already in use for extended distances," said Joe Dambach, product manager, Molex. "By pairing our advanced cabling solutions with Credo SerDes technology, we can show groundbreaking signal integrity performance at very high speeds over increasing lengths using copper cables."

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates. Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com.

Credo Demonstrates Single-Lane 112G and 56G PAM-4 SerDes IP at TSMC OIP Forum

Shatters Performance, Bandwidth Barriers to Enable Next-Generation Data Center Solutions

Milpitas, Calif., September 19, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its full offering of advanced SerDes IP at the upcoming TSMC Open Innovation Platform® (OIP) Ecosystem Forum, including a new single-lane 112G PAM-4 short reach (SR) IP solution and a new long reach (LR) 56Gbps PAM-4 SerDes IP solution. The wide range of Credo SerDes IP solutions enables ASIC, ASSP, and SoC designers to instantly design low-power, high-performance chip-to-chip, chip-to-module, chip-to-backplane and cable solutions for data centers, enterprise networks, and high-performance computing applications.

WHERE:   

TSMC OIP Ecosystem Forum

San Jose McEnery Convention Center

150 West San Carlos Street

San Jose, CA 95113

Booth #612

WHEN:    

September 22, 2016

8 a.m. – 6 p.m.

WHAT:     

The Open Innovation Platform® is hosted by TSMC and built on the company's design-enabling building blocks and an ecosystem interface. The Open Innovation Platform® is available to customers and ecosystem partners to improve time-to-market, increase return on investment and reduce waste. 

Credo will drive 56G PAM-4 signals, error free, across a variety of LR channels, as well as demonstrate a wide range of previously announced 28G and 56G SerDes IP on TSMC’s 28nm, 16nmFF+, and 16nmFFC processes.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com.

Credo 16-nm 28G and 56G PAM-4 SerDes Now Available on TSMC FinFET Compact Process

Enables Customers to Leverage Advanced, Low-Power Process for Next-Generation Designs

Milpitas, Calif., May 9, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced the availability of its 28G and 56G PAM-4 SerDes transceiver IP on TSMC’s 16-nm FinFET Compact (16FFC) process, enabling its growing customer base to take advantage of the low-power benefits of this advanced, new process in next-generation designs.

“Our close relationship with TSMC translates into a win-win for customers,” said Bill Brennan, CEO of Credo Semiconductor.  “As one of the first SerDes IP suppliers to port to this node, we enable the best of both worlds – the combination of robust SerDes solutions with TSMC’s advanced low-power 16FFC process.  We look forward to supporting the needs of our mutual customers who are already adopting 16FFC for their next-generation designs.”

“TSMC continues to expand 16-nm manufacturing options, providing customers with advanced technology to enable their end products,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. “We have many customers that want both 28G and 56G SerDes IP solutions, and the availability of Credo’s IP provides a proven solution for 16FFC high-performance computing applications.”

Availability and Deliverables

The Credo 28G and 56G PAM4 SerDes IP is available now on the TSMC 16-nm FinFET Plus (FF+) and 16FFC processes.  Deliverables include user and SoC integration guides; netlist; timing library; register map; Verilog, ATPG, and IBIS-AMI models; LEF views; Layout Versus Schematic (LVS) and Design Rule Check (DRC) reports.

Those interested in learning more about the company’s current silicon and intellectual property engagement options, as well as future developments, should contact sales@credosemi.com.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com.

Credo 16-nm 56G PAM-4 SerDes IP Now Available

Delivers Advanced IP on the TSMC 16-nm FinFET+ Process

Milpitas, Calif., March 14, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced that its 56Gbps PAM-4 SerDes IP is available for the TSMC 16-nm FinFET+process. Based on Credo’s unique analog architecture that delivers low power and high performance, the new SerDes IP can be leveraged by ASIC, SoC and systems designers to dramatically increase bandwidth in data centers, enterprise networks, and high-performance computing applications.

“We continue to provide our high-profile semiconductor and networking customers a migration path to the industry’s fastest data rates with cutting-edge performance and extremely low power,”said Jeff Twombly, vice president of business developmentat Credo. “Credo’s unique analog architecture delivers a compelling solution for optimizing power and performance as our customers move from single-lane 28G connections to single-lane 56G connections. As important, our solutions enable innovations at the sytem level that meet the accelerating demand for higher bandwidth in data centers.”

Credo has demonstrated its solution by driving a 56G PAM-4 signal, error free,across a variety of copper cable lengths. Credo also has a wide range of previously announced 28G and 56G SerDes IP available.

Supporting the speed and modulation schemes in definition by emerging IEEE and OIF CEI standards, the new Credo 56G PAM-4 SerDes IP is ideal for use in next-generation chip-to-chip, chip-to-module, chip-to-backplane and cable solutions targeting 100G and 400G networks. It can also be used in existing networks to provide 10G, 25G, 40G and 50G connectivity with extended reach.

Availability and Deliverables

The Credo 56G PAM-4 SerDes IP is available now on the TSMC 16-nm FinFET+ process and is expected to be available Q2 2016 on the TSMC FinFET Compact (FFC) process.  Deliverables include user and SoC integration guides; netlist; timing library; register map; Verilog, ATPG, and IBIS-AMI models; LEF views; Layout Versus Schematic (LVS) and Design Rule Check (DRC) reports.

Companies interested in learning more about the company’s current silicon and intellectual property engagement options, as well as future developments, should contact sales@credosemi.com.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com.

Credo 100G Retimer Family Delivers Unparalleled Low-Power and Extended Reach

Enables Robust Signal Integrity for Backplane, Front Panel and Cable Applications

Milpitas, Calif., Feb.23, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it is expanding its product offering with a new retimer family that leverages the company’s unique 25G SerDes architecture to deliver industry-leading power and reach. Providing extended reach performance of over 40dB, the Credo® CRT25XX family provides guaranteed, end-to-end signal integrity in backplane, front panel andcopper cable applications.

“The introduction of the CRT25XX retimer family furthers Credo’s commitment to provide high performance interconnect solutions that are required to fuel the next generation of data center, enterprise networking, and high performance computing platforms,” said Jeff Twombly, vice president of business developmentat Credo." In addition to providing unparalleled signal integrity, we are leveraging our extensive analog and mixed-signal expertise to develop solutions with extremely low power consumption and superior reach which are critical in scaling network speeds to 100G, 200G, 400G, and beyond.”

The new retimer family delivers the industry’s lowest power at less than 200mW per channel while achieving over 40dB of insertion loss performance. The extended reach performance provides robust signal integrity at 25Gbps across the most difficult channels, including legacy backplanes. In addition, system level integration and deployment is simplified with the company's unique Credo® Link Primer™ technology, which provides advanced auto-negotiation capabilities and highly flexible link trainingto enable seamless interoperability with IEEE-compliant devices from other vendors.

The Credo CRT25XX family consists of single and multi-channel devices that support bandwidth from 25Gbps to 200Gbps.  Family members include:

  • 25G bi-directional 1x25G retimer (CRT2521)

  • 50G bi-directional 2x25G retimer (CRT2522)

  • 100G bi-directional 4x25G retimer (CRT2524)

  • 200G bi-directional 8x25G retimer (CRT2528)

  • 200G uni-directional 8x25G retimer (CRT2518)

Additional Features Include:

Support for the latest interface standards driving the Ethernet and optical markets, including:

  • IEEE 802.3by (single-lane 25G), IEEE 802.3ba (40/100G)

  • CEI-25G-LR (long-reach backplane and copper cables)

  • CEI-28G-SR (chip-to-chip), CEI-28G-VSR (chip-to-module)

  • Auto Negotiation per IEEE 802.3 Clause 73

  • KR backchannel per IEEE 802.3 Clause 72

  • MDIO interface per IEEE 802.3-2012 Clause 45

Advanced and flexible equalization capabilities, including:

  • TX equalization with programmable main, pre, and post-cursor

  • Fully adaptive and programmable RX equalization with CTLE and DFE

  • Programmable Tx/Rx equalization of all SerDes interfaces

  Comprehensive diagnostics features, including:

  • Pattern generator and checker (PRBS and user defined)

  • Internal eye monitor

  • Analog test points

  • Input/output polarity swapping

Availability and Packaging

Credo is currently sampling the CRT2524 bi-directional quad-channel device in a 10x10mm BGA package.  Credo supports its offering with an evaluation kit, also available now, that allows customers to quickly evaluate the performance in their specific application environments.  Other device family members are expected to sample in Q2.

Companies interested in learning more about the company’s current silicon and intellectual property engagement options, as well as future developments should contact Sales@credosemi.com.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com.

Credo Demonstrates 56G PAM-4, 56G NRZ and 28G NRZ SerDes Technology at DesignCon

Robust Solutions Drive Error-Free Connectivity in Backplanes and Copper Cables

Milpitas, Calif., January 19, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its 56 Gbps(G) PAM-4, 56GNRZ and 28G NRZ SerDes technologies at DesignCon 2016. The conference starts today at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits taking place Jan. 20-21.

‘’New innovation in enterprise, data center and HPC environments require faster, denser, and longer reach connectivity solutions to improve network, computing, and storage throughput,” said Rajan Pai, vice president of system applications at Credo. “These demonstrations with high-profile cable and connector manufacturers using our latest Credo 56G PAM-4 and MUX solutions, as well as our proven 28G and 56G NRZ solutions, unleash new opportunities in cable, connector and optical component offerings for quick adoption within existing data center infrastructures.”

Demonstrations with Amphenol (Booth #635), Amphenol FCI (Booth #533) and Molex (Booth #817) leverage Credo’s 56G NRZ SerDes IP evaluation platform and Credo’s recently announced 100G CMX12520 multiplexer (MUX)/retimer chip—enabled by Credo’s 56G PAM-4 SerDes—to drive error-free connectivityover copper cables, orthogonal backplanes,and cable backplanes. The 56G NRZ demonstrations highlight the fact that high performance computing (HPC) environments have the ability to deploy low latency, error-free systems without the need for forward-error correction (FEC).  Additionally, Credo is demonstrating long-reach 28G technology with Lorom (Booth #502), showcasing highly malleable 3-meter and 5-meter copper cables for datacenter connectivity.

Demonstrations with Amphenol FCI

Credo will conduct two demonstrations with Amphenol FCI.  The first will show 56G NRZ transport over FCI’s ExaMAX® direct-mate orthogonal interconnect system.  The second demonstration will show 56G PAM-4 transport over the same architecture.

“Now that FCI is a member of the Amphenol family, we can collaborate with our sister divisions to offer an unmatched portfolio of high-speed interconnect solutions,” said Dana Bergey, signal integrity manager at Amphenol FCI.  “ExaMAX® connectors have become a very popular choice for 28G applications around the globe, including standard backplane, midplane, mezzanine, coplanar, and direct-mate orthogonal versions.  We are excited to work with Credo to show how ExaMAX products can successfully pass 56GB signals—error-free—with all the popular encoding techniques.”

Demonstration with Lorom

Credo will conduct two demonstrations with Lorom. In addition to driving error-free 28G signals across standard Lorom Emaxx cables at lengths up to eight meters, the Credo 28G SerDes IP evaluation platform will be leveraged to demonstrate error-free transmission acrossLorom’s light-weight and highly flexible three-meter and five-metercables in both SFP and QSFP form factors.

Lorom’s bulk cable performance utilizes low-loss foamed dielectric, low surface roughness foils and proprietary manufacturing processes to achieve among the lowest insertion loss per meter in the industry. In addition to having this low insertion loss performance, Lorom’s well-balanced cables exhibit nominal mode conversion below 30dB. This further minimizes insertion loss and provides consistent pair-to-pair performance.

“The combination of Lorom’s advanced cabling technology and Credo’s industry leading SerDes technology enables signals to be pushed farther in length, across cables with smaller outer diameters, without the need for FEC,” said Henning Hansen, chief operating officer of The Lorom Group. “The small size, light weight and extreme malleability of these cables should have a profound impact on front-panel datacenter rack connectivity.

Demonstrations with Molex

Credo will conduct two demonstrations withMolex. For the first demonstration,Credo will supply transmitting and receiving electronics, showing error-free 56G NRZ and 56G PAM-4 live serial traffic on the zQSFP+™form factor using a high-speed copper cable. The second demonstration will highlight the Molex Impel™ backplane cable assembly driving 56G speeds in both NRZ and PAM-4 applications.

“This demonstration will highlight the feasibility of running extremely high, next-generation data rates, even on form factors that are already in use,” said Joe Dambach, product manager, Molex. “By pairing our advanced cabling solutions with Credo SerDes technology, we can show groundbreaking signal integrity performance at very high speeds.”

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com

###

Credo is a trademark of Credo Semiconductor.  All other trademarks are the property of their respective holders.

Credo Delivers Industry’s Lowest Power 100G MUX Device Based on 50Gbps SerDes Technology

New Chip Solution Leverages Analog PAM-4 SerDes to Enable 50Gbps/Lambda Optical Connectivity

Milpitas, Calif., January 12, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it is entering the chip market with a sub 1 Watt multiplexer (MUX)/retimer device that leverages the company’s unique SerDes architecture and low-cost analog technology to enable 100G optical modules with 50G per lambda throughput. The Credo® CMX12550 MUX, sampling now, supports four bidirectional lanes running at 25Gbps with NRZ signaling and 2 bidirectional lanes running at 50Gbps with PAM-4 signaling.

“The combination of our unique analog architecture and advanced equalization techniques has allowed us to deliver a solution that solves the significant thermal and performance challenges associated with developing next-generation optical modules,” said Jeff Twombly, vice president of business development for Credo. “As the first of many off-the-shelf semiconductor solutions to come from Credo, this new device demonstrates how our SerDes IP technology can be applied to enable accelerated throughput in the data center.”

While other companies have had to resort to high power and expensive DSP architectures to achieve 50Gbps SerDes line rates, Credo’s unique approach achieves these line rates with significantly lower power consumption while meeting the reach performance requirements of next-generation optical networking applications. In addition to optical modules, the CMX12550 device can also be deployed on line cards providing a native 50G PAM4 interface into optical modules, thus enabling a doubling of throughput on the front panel.

The device is compliant with many industry standards including CEI-28G-VSR/SR, CEI-56G-VSR-PAM4, CAUI-4, and CDAUI-8.

Availability and Packaging

Credo is currently sampling the CMX12550 device in a 10x10mm FCBGA package.  Credo supports its offering with a comprehensive evaluation kit, also available now, that allows customers to quickly assess the performance in their specific application environments.  Other device family members are expected to sample this summer.
Companies interested in learning more about the company’s current silicon and intellectual property engagement options, as well as future developments should contact Sales@credosemi.com.

About Credo Semiconductor

Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity.  The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates.  Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong.  For more information:  www.credosemi.com