Press releases


October 30, 2018 | Credo First to Publicly Demonstrate 112G SerDes in 7nm at TSMC’s 2018 China OIP Forum

Credo, a global innovation leader in high performance, low power connectivity solutions for 100G, 200G, and 400G port enabled networks, today announced it will demonstrate its advanced high performance, low power, mixed-signal 112Gbps PAM4 SerDes developed in TSMC’s7nm process technology node at this week’s TSMC 2018 Open Innovation Platform (OIP) Ecosystem Forum in Nanjing, China.


October 3, 2018| Credo to Showcase 56Gbps and 112Gbps SerDes at TSMC’s 2018 Open Innovation Platform Ecosystem Forum

Credo, a global innovation leader in high performance, low power connectivity solutions for 100G, 200G, and 400G port enabled networks, today announced it will demonstrate its advanced high performance, low power SerDes IP offerings at this week’s TSMC 2018 Open Innovation Platform (OIP) Ecosystem Forum.  Credo will be featuring its single-lane rate 56Gbps SerDes on TSMC’s 7nm process technology node and its single lane rate 112G PAM4 SerDes on TSMC’s 16nm process technology node.


Sept 24, 2018 | Credo Mixed-Signal DSPs showcased in 100G & 400G Optical Modules at ECOC

Credo, a global innovation leader in high performance, low power connectivity solutions for 100G, 200G, and 400G port enabled networks, today announced that its mixed-signal DSP engines which are a key enabling technology for 100G and 400G single lane rate optical connectivity will be on display this week during the European Conference on Optical Communication (ECOC) in Rome.  The Credo 100G CMX125100KP and 400G CMX450100P devices are incorporated in 100G DR/FR/LR and DR4/FR4 modules which will demonstrated on the show floor in the exhibition hall at the ECOC event.


Sept 4, 2018 | Credo to Demonstrate 100G Mixed-Signal DSP for 100G DR1 & 400G DR4 Optical Modules at CIOE; Enabling Accelerated Adoption of End-to-End 100G Single Optical Lambda Connectivity

Shenzhen, China, Sept 4, 2018 – Credo, a global innovation leader in high performance, low power connectivity solutions for 100G, 200G, and 400G port enabled networks, today announced it will demonstrate its 100G single lane rate mixed-signal Digital Signal Processing (DSP) solutions to enable 100G per lambda optical connections at the 2018 China International Opto-electronic Exposition (CIOE). The conference starts today at the Shenzhen Convention & Exhibition Center, Fuhua 3rd Rd, FuTian CBD, Futian Qu, Shenzhen Shi, Guangdong Sheng, 518000, China, with exhibits taking place from September 5 through September 8.


Sept 4, 2018 | Credo Demonstrates 100G, 200G, and 400G Active Ethernet Cables at CIOE 2018; Robust, High Performance Connectivity for Next Generation Datacenter and Enterprise Networks

Credo, a global innovation leader in high performance, low power connectivity solutions for 100G, 200G, and 400G port enabled networks, today announced it will conduct multiple product demonstrations at the 2018 China International Opto-electronic Exposition (CIOE) showcasing its new product family of Active Ethernet Cables (AEC).  The Credo AEC family is engineered to provide robust, deterministic solutions for a variety of 100G, 200G, and 400G intra-rack and inter-rack connectivity requirements. The conference starts today at the Shenzhen Convention & Exhibition Center, Fuhua 3rd Rd, FuTian CBD, Futian Qu, Shenzhen Shi, Guangdong Sheng, 518000, China, with exhibits taking place from September 5 through September 8.


July 2018 | Credo Demonstrates Industry Leading SerDes on TSMC’s 7nm Process at TSMC 2018 OIP Forum and Technology Symposium in Amsterdam

Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its advanced high performance, low power SerDes IP offerings at next week’s TSMC 2018 OIP Forum and Technology Symposium in Amsterdam.  Credo will be featuring single-lane rate 56G PAM4 SerDes operating in both TSMC 12nm and 7nm process technology nodes.


June 2018 | Credo Demonstrates Robust 200G & 400G Connectivity Product Solutions at Computex 2018 High Performance Devices Enable Next Generation Datacenter and Enterprise Networks

Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple product demonstrations at Computex showcasing its core low power, high performance 56G SerDes technology as the enabler for 200G and 400G network connectivity. The conference starts today at the TWTC Exhibition Hall 1, Taipei Nangang Exhibition Center, Hall 1, Taipei International Convention Center, with exhibits taking place June 5 through June 9.


May 1, 2018 | Credo Demonstrates 112G PAM4 and 56G PAM4 SerDes IP Solutions at TSMC 2018 Technology Symposium

Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its advanced high performance, low power SerDes IP offerings at this week’s TSMC Technology Symposium, featuring single-lane rate 112G PAM4 and single-lane rate 56Gbps PAM4.


March 12, 2018 | Credo Demonstrates Robust, Low-Power 112G PAM4 Solutions at OFC 2018 Accelerating End-to-End 112G HyperScale Cloud Connectivity

Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct optical and electrical demonstrations utilizing its low power, high performance 112Gbps (G) PAM4 SerDes technology and solutions at the 2018 Optical Networking and Communication Conference (OFC). The 112G SerDes technology was developed in mature TSMC process technologies.  For 112G per lambda optical connectivity (i.e., DR, DR4, FR4), Credo has delivered product solutions in TSMC 28nm.  For 112G electrical VSR and LR reaches, Credo has delivered the solutions in TSMC 16nm.  The conference starts today at the San Diego Convention Center, with exhibits taking place March 13–15.


March 12, 2018 | Open-Silicon, Credo and IQ-Analog Showcase Complete End-to-End Networking ASIC Solutions at OFC 2018

Open-Silicon, Credo and IQ-Analog will participate in joint demonstrations at the Optical Fiber Communications Conference (OFC) 2018 in San Diego, CA on March 13-15. The companies will showcase their complete end-to-end ASIC solutions for leading-edge networking applications, such as long-haul, metro and core, broadband access, optical, carrier IP and data center interconnect. Open-Silicon will present its ASIC offerings as well as its comprehensive Networking IP Subsystem Solution, which includes high-speed chip-to-chip interface Interlaken IP, Ethernet Physical Coding Sublayer (PCS) IP, FlexE IP compliant to OIF Flex Ethernet standard v1.0 and v2.0, and Multi-Channel Multi-Rate Forward Error Correction (MCMR FEC) IP. Open-Silicon will also demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution. Credo will demonstrate its high-speed 56Gbps PAM4 LR Multi-Rate SerDes solution and 112Gbps PAM4 SR/LR SerDes targeted for next generation networking ASICs. IQ-Analog will showcase its high-performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).


January 31, 2018 | TE Connectivity and Credo pave the way for 112G single lane connectivity; Live demonstration for the first time at DesignCon 2018

TE Connectivity (TE), a world leader in connectivity and sensors,  and Credo, a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets, today announced they have teamed up to demonstrate the future of networking technologies.


January 30, 2018 | Credo Demonstrates Robust 112G PAM4 Single Lane Electrical SerDes Techology at DesignCon 2018; Accelerating the Deployment of 112G end-to-end Datacenter Connectivity

Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its low power, high performance 112Gbps (G) PAM4 SerDes technologies at DesignCon 2018. The conference starts today at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits taking place Jan 31 and Feb 1.


September 18, 2017 | Source Photonics and Credo Semiconductor Demonstrate Single Lambda 100G Connectivity over 20km of Fiber with Compact TOSA and ROSA Assemblies

Source Photonics and Credo Semiconductor Demonstrate Single Lambda 100G Connectivity over 20km of Fiber with Compact TOSA and ROSA Assemblies.


September 17, 2017 | Credo Demonstrates Single-Lane 100G PAM-4 at ECOC 2017

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate single-lane 100G PAM-4 SerDes performance at this week’s ECOC 2017 Conference in Gothenburg, Sweden. 


September 17, 2017 | Credo Demonstrates Single-Lane 50G NRZ at ECOC 2017

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate single-lane 50G NRZ at this week’s ECOC 2017 Conference in Gothenburg, Sweden. 


September 14, 2017 | Credo Receives Coveted TSMC 2017 Open Innovation Platform® Partner of the Year Specialty Technology IP Award

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced that it received TSMC’s 2017 Open Innovation Platform Partner of the Year Award in the category of Specialty Technology IP.


September 13, 2017 | Credo Demonstrates Single-Lane 112G and 56G PAM4 SerDes IP Solutions at TSMC 2017 OIP Ecosystem Forum

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its full offering of advanced SerDes IP at this week’s TSMC Technology Symposium, showcasing single-lane 112G PAM4 SerDes solutions. The wide range of Credo SerDes IP solutions enables ASIC, ASSP, and SoC designers to meet the power and performance requirements of a variety of TSMC advanced processing nodes and supports emerging IEEE standards including 802.3cd/802.3bs/802.3bm which call out 100GBase-DR1, 400GBase-DR4, and 400GBase-FR4.


May 22, 2017 | Credo and FIT Deliver Robust 10m 100G Active Copper Cable Solutions

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, and Foxconn Interconnect Technology, Inc. ("FIT"), a leading supplier of interconnect solutions, announced today that they will demonstrate robust and error-free 100G QSFP28 active copper cable (ACC) connectivity solutions with reach up to 10 meters (m) in a private suite at the Grand Hyatt during the Computex Show, May 30-June 3, in Taipei. 


May 8, 2017 | Credo Unveils Robust Portfolio of 56G and 112G PAM-4 PHY Connectivity Solutions

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced a comprehensive portfolio of 56G and 112G PAM-4 PHY devices, enabling connectivity for enterprise, hyperscale datacenter, and service provider networks.


March 13, 2017 | Credo Demonstrates Single-Lane 112G and 56G PAM4 SerDes IP at TSMC Technology Symposium 2017

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will demonstrate its full offering of advanced SerDes IP at this week’s TSMC Technology Symposium, including a single-lane 112G PAM4 short reach (SR) IP solution and long reach (LR) 56Gbps PAM4 SerDes IP solution.


January 30, 2017 | Credo Demonstrates 112G PAM4 SR, 56G PAM4 LR, and 56G NRZ SerDes Technology

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its low power 112Gbps (G) PAM4, 56G PAM4 LR and 56GNRZ LR SerDes technologies at DesignCon 2017. The conference takes place this week at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits running Feb 1-2.


September 19, 2016 | Credo Demonstrates Single-Lane 112G and 56G PAM-4 SerDes IP at TSMC OIP Forum

Credo today announced it will demonstrate its full offering of advanced SerDes IP at the upcoming TSMC Open Innovation Platform® (OIP) Ecosystem Forum, including a new single-lane 112G PAM-4 short reach (SR) IP solution and a new long reach (LR) 56Gbps PAM-4 SerDes IP solution.


May 9, 2016 | Credo 16-nm 28G and 56G PAM-4 SerDes Now Available on TSMC FinFET Compact Process

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced the availability of its 28G and 56G PAM-4 SerDes transceiver IP on TSMC’s 16-nm FinFET Compact (16FFC) process, enabling its growing customer base to take advantage of the low-power benefits of this advanced, new process in next-generation designs.


March 14, 2016 | Credo 16-nm 56G PAM-4 SerDes IP Now Available

Milpitas, Calif., March 14, 2016 – Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announcedthat its56Gbps PAM-4 SerDes IP is available for the TSMC 16-nm FinFET+process.


February 23, 2016 | Credo 100G Retimer FamilyDelivers Unparalleled Low-Power and Extended Reach

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it is expanding its product offering with a new retimer family that leverages the company’s unique 25G SerDes architecture to deliver industry-leading power and reach.


January 19, 2016 | Credo Demonstrates 56G PAM-4, 56G NRZ and 28G NRZ SerDes Technology at DesignCon

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it will conduct multiple demonstrations of its 56 Gbps(G) PAM-4, 56GNRZ and 28G NRZ SerDes technologies at DesignCon 2016.The conference starts today at the Santa Clara Convention Center in Santa Clara, Calif., with exhibits taking place Jan. 20-21.


January 12, 2016 | Credo Delivers Industry's Lowest Power 100G MUX Device Based on 50Gps SerDes Technology. New Chip Soluiton Leverages Analog PAM-4 SerDes to Enable 50Gbps/Lambda Optical Connectivity

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it is entering the chip market with a sub 1 Watt multiplexer (MUX)/retimer device that leverages the company’s unique SerDes architecture and low-cost analog technology to enable 100G optical modules with 50G per lambda throughput.


December 2, 2015 | Credo Delivers Industry’s Lowest Power 16nmFF+ 28GLR-Compliant SerDes IP with Comprehensive Development Platform

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announcedthe commercial availability of a complete development platform for its advanced 28G SerDes IP on the TSMC16nmFF+ process node.


August 31, 2015 | Credo Raises $8 Million in Series A Funding

Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced that it has raised over $8 million in Series A funding led by global venture capital firm, Walden International.  In addition to scaling every aspect of the Credo operation, the funding will be used to expand the development and deployment of its leading-edge SerDes IP and complementary high-speed interconnect devices.