Credo is a leading provider of high performance/low power semiconductor solutions for the data center, enterprise networking and high performance computing markets. Our purpose-built approach to SerDes design enables our products to be built on mature process technology, providing our customers with a competitive edge.
Our innovative Serializer-Deserializer (SerDes) technology delivers the bandwidth, scalability and end-to-end signal integrity needed to meet the demands of advanced networks up to 800G with single-lane 28G, 56G, or 112G connectivity.
Backplane & Line Card Connectivity
Credo is at the forefront of 400G/800G backplane and line card connectivity. Our product offering includes: Retimers, Gearboxes and MACsec devices.
The family supports 56G per lane connectivity and PAM4/NRZ signaling for 12.8Tbps platforms. These scale up to 112G per lane for next generation 800G port connectivity solutions to support 25.6Tbps platforms.
Our mixed signal DSPs for optical connectivity are enabling the cloud-scale datacenter buildouts for 100G and 400G. The Raptor 100 and Raptor 400 are built on a mature process technology, providing our customers with a competitive edge.
HiWire™ Active Electrical Cables (AEC)
400G connectivity is no longer a challenge with this copper alternative to AOC. Credo has invented a new cable connectivity system, the HiWire Active Electrical Cable (AEC), that integrates gearbox, retimer and FEC functionality into a smaller gauge copper cable, eliminating the hassles of copper while protecting the integrity of the network.
One solution can support connectivity scalable to 400G with:
Plug-and-play simplicity (“AUI” to “AUI” standards compliant)
A thinner, more flexible 30 or 26 AWG copper wire in lengths of 1m–7m
Integration of a gearbox, retimer and FEC supporting error-free PAM4 and NRZ signaling performance
Multiple connectors including OSFP, QSFP56-DD, QSFP56, QSFP28, SFP56-DD, SFP56 and DSFP
SerDes IP and Chiplets
SERDES INTELLECTUAL PROPERTY
Get to market sooner with your next generation ASIC design using SerDes IP and Chiplets from Credo.
Our unprecedented power savings and performance are delivered in designs you can use today including:
Pair your 16nm or 7nm Switch Fabric ASIC with our SerDes Chiplets:
56G SerDes Chiplet
28nm TMSC process
2.5D Silicon Interposer
Ideal for 12.8Tbps Switch Fabric ASIC
112G SerDes Chiplet
16nm TSMC process
MCM/XSR and 2.5D Silicon Interposer
Ideal for 25.6Tbps Switch Fabric ASIC
Enabling Single-Lane RATE 25G, 50G and 100G Connectivity
As a global innovation leader in Serializer-Deserializer (SerDes) technology, Credo has consistently broken through perceived technical barriers, delivering industry-leading speed, power and equalization. Credo's unique, patented mixed signal architecture is the foundation for its high performance, low power, connectivity solutions and robust IP offerings.
The company’s many technical achievements include the industry’s first public demonstration of 100G PAM4. An impressive achievement in 28nm demonstrating the Credo technology does not depend on the most advance processing nodes.
As bandwidth requirements grow due to demand from applications like big data, mobility and cloud, designers can rely on Credo’s technology to accelerate throughput and deliver robust end-to-end signal integrity solutions in next-generation platforms requiring single-lane rate 25G, 50G, and 100G connectivity.
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